000 00670nam a2200253Ia 4500
100 _aASHENDEN PETER J
020 _a978-81-909-3563-0
650 _aDigital Design An Embedded Systems Approach Using Verilog
365 _cRS
365 _d1
365 _e25
942 _cENGBK
654 _aDigital
654 _aDesign
654 _aEmbedded
654 _aSystems
654 _aApproach
654 _aUsing
654 _aVerilog
654 _aDigital Design An Embedded Systems Approach Using Verilog
245 _aDigital Design An Embedded Systems Approach Using Verilog
260 _bElsevier India Pvt Ltd
_c2014
_aNew Delhi
300 _aXX+557PP
999 _c27459
_d27459