| 000 | 00752nam a2200277Ia 4500 | ||
|---|---|---|---|
| 100 | _aPRAMOD P, RAJ KUMAR and RAJU DASAR | ||
| 650 | _aFPGA Implementation of Sonstant False | ||
| 520 | _aINTERNAL GUIDE: ARSHIYA SULTANA, MVJCE EXTERNAL GUIDE: PARAMITA BARUA, SCIENTIST D, LRDE | ||
| 365 | _cRS | ||
| 365 | _d1 | ||
| 942 | _cIR | ||
| 654 | _aA | ||
| 654 | _aProject | ||
| 654 | _aReport | ||
| 654 | _aon | ||
| 654 | _aFPGA | ||
| 654 | _aImplementation | ||
| 654 | _aSonstant | ||
| 654 | _aAlarm | ||
| 654 | _aRate | ||
| 654 | _aAlgorithm | ||
| 654 | _aFPGA Implementation of Sonstant False | ||
| 245 | _aA Project Report on FPGA Implementation of Sonstant False Alarm Rate Algorithm | ||
| 260 | _c2012-13 | ||
| 300 | _aXVII+68 PP | ||
| 999 |
_c19714 _d19714 |
||