| 000 | 01054nam a2200313Ia 4500 | ||
|---|---|---|---|
| 100 | _aCHETAN KUMAR M, BALARAJ C R AVINASH and MAHANTESHA N M | ||
| 650 | _aDynamic Buffer ResizeTechnique for Networks on Chip on FPGA | ||
| 520 | _aINTERNAL GUIDE : Shilpa EXTERNAL GUIDE : Prayoona Valsalan and Naveen Kumar G N USN NO : 1MJ10EC417, 1MJ10EC408, 1MJ10EC407, 1MJ10EC419 CARRIED OUT AT : MVJ College Of Engineering Bangalore-560067 ACC NO : PR1976 | ||
| 365 | _cRS | ||
| 365 | _d1 | ||
| 942 | _cPRCD | ||
| 654 | _aProject | ||
| 654 | _aReport | ||
| 654 | _aon | ||
| 654 | _aA | ||
| 654 | _aDynamic | ||
| 654 | _aBuffer | ||
| 654 | _aResizeTechnique | ||
| 654 | _afor | ||
| 654 | _aNetworks | ||
| 654 | _aon | ||
| 654 | _aChip | ||
| 654 | _aon | ||
| 654 | _aFPGA | ||
| 654 | _aDynamic Buffer ResizeTechnique for Networks on Chip on FPGA | ||
| 245 | _aProject Report on A Dynamic Buffer ResizeTechnique for Networks on Chip on FPGA | ||
| 260 | _c2013 | ||
| 300 | _a63PP | ||
| 999 |
_c18370 _d18370 |
||