Project Report on A Low Area Multilink Interconnect Architecture for Gals Chip Multi Processors
- 2011-12
- VII+74P
INTERNAL GUIDE: I HAMEEM SHANAVAS, ASST PROF, MVJCE
Low Area Multilink Interconnect Architecture for Gals Chip Multi Processors
Project Report on A Low Area Multilink Interconnect Architecture for Gals Chip Multi Processors Low Area Multilink Interconnect Architecture for Gals Chip Multi Processors