TY  - BOOK
AU  - MALINDER KAUR and POORNIMA S
TI  - Project Report on Implementation of 16 BIT Paraller 1/0 using VHDL
PY  - 2004///
KW  - VHDL
KW  - Project
KW  - Report
KW  - on
KW  - Implementation
KW  - 16
KW  - BIT
KW  - Paraller
KW  - 1/0
KW  - using
N2  - INTERNAL GUIDE: M S HIREMATH, MVJCE  EXTERNAL GUIDE: AZEEZ, LRDE
ER  -