Verilog HDL (Record no. 35417)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00481nam a2200205Ia 4500 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 978-81-7758-918-4 |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | PALNITKAR SAMIR |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 2nd |
| 245 ## - TITLE STATEMENT | |
| Title | Verilog HDL |
| Remainder of title | A Guide to Digital Design and Synthesis |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Name of publisher, distributor, etc. | Pearson India Education Services Pvt Ltd |
| Date of publication, distribution, etc. | 2008 |
| Place of publication, distribution, etc. | Noida |
| 365 ## - TRADE PRICE | |
| Currency code | RS |
| 365 ## - TRADE PRICE | |
| Unit of pricing | 1 |
| 365 ## - TRADE PRICE | |
| Price note | 30 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 490PP |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Verilog HDL |
| 654 ## - SUBJECT ADDED ENTRY--FACETED TOPICAL TERMS | |
| Focus term | Verilog |
| 654 ## - SUBJECT ADDED ENTRY--FACETED TOPICAL TERMS | |
| Focus term | HDL |
| 654 ## - SUBJECT ADDED ENTRY--FACETED TOPICAL TERMS | |
| Focus term | Verilog HDL |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Donated Engineering Book |
| Withdrawn status | Lost status | Damaged status | Not for loan | Collection code | Home library | Current library | Date acquired | Total Checkouts | Total Renewals | Full call number | Barcode | Date last seen | Date last checked out | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Electronics & Communication Engineering | MVJCE CENTRAL LIBRARY | MVJCE CENTRAL LIBRARY | 12/07/2022 | 1 | 2 | 621.392 PAL 2;3 | D4263 | 22/02/2024 | 09/01/2024 | 14/07/2023 | Donated Engineering Book |
